Microprocessor 8085 Ppt By Gaonkar New
The Definitive Guide to the Microprocessor 8085: Unlocking the "Gaonkar New" PPT Experience
Part 6: Case Study – A Perfect Slide from a "New Gaonkar PPT"
Imagine you find a deck titled Gaonkar_8085_Unit4_Interrupts_v2024.pptx. Let’s review what an exemplary slide looks like.
Slide Title: Hardware Interrupts in 8085 microprocessor 8085 ppt by gaonkar new
Content Layout:
- Top Right (Diagram): A vector graphic showing the 8085 pins (TRAP, RST 7.5, RST 6.5, RST 5.5, INTR) entering the interrupt control logic.
- Left Column (Text):
- TRAP: Non-maskable, Edge & Level sensitive (Highest Priority).
- RST 7.5: Maskable, Rising Edge, Restart address
003CH. - RST 6.5: Maskable, Level sensitive, Restart
0034H.
- Bottom (Animation box): "Click to show difference between Vectored vs Non-vectored."
- Pop-up text: "INTR is Non-vectored (requires external hardware to supply opcode). All others are Vectored."
- Footer: Source: Gaonkar, Ch. 12 (Updated for 2023 syllabus).
This structure is information-dense but visually clear—the hallmark of a modernized educational slide. The Definitive Guide to the Microprocessor 8085: Unlocking
Slide 5: Pin Diagram & Signals (New annotated version)
- Multiplexed AD0–AD7, A8–A15.
- Control signals: RD, WR, ALE, IO/M, S0, S1.
- New addition: simplified signal grouping table.
Slide 14: 8085 vs Modern Microcontrollers (New slide)
- 8085 → 8051 → Arduino (AVR) → STM32.
- What remains relevant: registers, flags, interrupts, stack.
7. Interrupts in the 8085
- The Hierarchy: TRAP (Highest), RST 7.5, RST 6.5, RST 5.5, and INTR (Lowest).
- New Visuals: A vector table showing memory locations (e.g., RST 5.5 calls 002CH).
- Masking: Explanation of the SIM (Set Interrupt Mask) and RIM (Read Interrupt Mask) instructions—a topic often butchered in older PPTs.
10. Solved Problems and Objective Questions (Exam Focus)
- The "New" Advantage: Inclusion of MCQs (Multiple Choice Questions) matching the GATE and technical university exams.
- Case Studies: Traffic light controller or washing machine controller using the 8085.
6. Stack and Subroutines (The RST Concept)
- New PPT Feature: Comparison of CALL vs JMP; using
PUSHandPOPto preserve register status. - Gaonkar’s Value: Clear explanation of the Stack Pointer (SP) initialization and how it decrements during pushes.
Slide 6: Addressing Modes (With Program Snippets)
- Immediate, Register, Direct, Indirect, Implied.
- New PPT style: Each mode appears as a card with a small example.
- Immediate:
MVI A, 05H - Indirect:
MOV A, M(M points to HL pair)
- Immediate:
- Interactive element (in PPT): Click to reveal the machine code (opcode + operand bytes).