Retro Computer-: The Zx Spectrum Ula- How To Design A Microcomputer -zx Design
The ZX Spectrum ULA — How to Design a Microcomputer (ZX Design / Retro Computer)
Example simplified timing and contention scheme (conceptual)
- Master clock: choose N× pixel clock (e.g., 3.5 MHz × 3 or similar depending on target).
- Counters produce:
- Horizontal character counter (0..31 or 0..255 depending on design).
- Scanline counter (0..n for vertical lines).
- Video DMA window:
- During specific t-states of each line, arbiter asserts bus to video fetcher to read sequential display bytes.
- Outside that window, CPU has full access; if CPU attempts access during DMA window, arbiter inserts wait states.
- Attribute fetch:
- Fetch attribute byte at a separate time or as part of the same DMA window.
Chapter 3: Memory Contention – The Z80’s “Wait State” Penalty
The Spectrum’s ULA implements a non-transparent memory access. The Z80 runs at 3.5 MHz, but the ULA reads video memory at 7 MHz during active scanlines. When the Z80 tries to access the same address range ($4000–$7FFF), the ULA:
- Pulls the
!WAITline low. - Holds the Z80 for one clock cycle, stealing that cycle for video.
Design Lesson: On your own computer, decide if you want shared video RAM. For a simpler design, use dual-port RAM or separate video RAM. For authenticity, implement contention logic in your ULA. The ZX Spectrum ULA — How to Design
Part 4: Designing Your Own ZX-Style Computer – The Modern ULA
You want to how to design a microcomputer inspired by the ZX? Do not start with a Z80. Start with a spreadsheet (for timing) and a CPLD. Master clock: choose N× pixel clock (e